dma.h

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#ifndef DMA_H
#define DMA_H
 
/* -- Includes -- */
#include <stdint.h>
#include "stm32f4xx.h"
#include "defines.h"
 
/* -- Structs -- */
struct __attribute__((packed)) DMAStreamRegs {
  REG32 CR;
  REG32 NDTR;
  REG32 PAR;
  REG32 M0AR;
  REG32 M1AR;
  REG32 FCR;
};
 
_Static_assert((sizeof(struct DMAStreamRegs)) == (sizeof(uint32_t) * 6U),
               "DMA Sx register struct size mismatch. Is it aligned?");
 
struct __attribute__((packed)) DMARegs {
  REG32 LISR;
  REG32 HISR;
  REG32 LIFCR;
  REG32 HIFCR;
  volatile struct DMAStreamRegs S[8];
};
 
_Static_assert((sizeof(struct DMARegs)) ==
                   (sizeof(uint32_t) * (4U + (6U * 8U))),
               "DMA register struct size mismatch. Is it aligned?");
 
#define DMA(x) (struct DMARegs *)(DMA1_BASE + (x * 0x400UL))
 
struct __attribute__((packed)) DMAStreamConfig {
  volatile _Bool Circular     : 1;
  volatile _Bool DoubleBuffer : 1;
  volatile _Bool PerIncrement : 1;
  volatile _Bool MemIncrement : 1;
  volatile _Bool PerFlowCtrl  : 1;
};
 
_Static_assert((sizeof(struct DMAStreamConfig)) == (sizeof(uint8_t) * 1U),
               "DMA Stream config struct size mismatch. Is it aligned?");
 
struct __attribute__((packed)) DMAStreamISR {
  volatile _Bool HTI  : 1;
  volatile _Bool TCI  : 1;
  volatile _Bool TEI  : 1;
  volatile _Bool FEI  : 1;
  volatile _Bool DMEI : 1;
};
 
_Static_assert((sizeof(struct DMAStreamISR)) == (sizeof(uint8_t) * 1U),
               "DMA Stream Interrupt struct size mismatch. Is it aligned?");
 
/* -- Enums -- */
typedef enum dma_peripheral {
  DMA_PERIPH_1 = 0x00,
  DMA_PERIPH_2 = 0x01
} dma_peripheral_t;
 
typedef enum dma_dir {
  DMA_DIR_PER2MEM = 0x00,
  DMA_DIR_MEM2PER = 0x01,
  DMA_DIR_MEM2MEM = 0x02
} dma_dir_t;
 
typedef enum dma_datasize {
  DMA_DATASIZE_BYTE = 0x00,
  DMA_DATASIZE_HWRD = 0x01,
  DMA_DATASIZE_WORD = 0x02
} dma_datasize_t;
 
typedef enum dma_priority {
  DMA_PRIORITY_LOW = 0x00,
  DMA_PRIORITY_MED = 0x01,
  DMA_PRIORITY_HIG = 0x02,
  DMA_PRIORITY_VHI = 0x03
} dma_priority_t;
 
void dma_set_addresses(const dma_peripheral_t dma, const uint8_t stream,
                       const uint32_t PA, const uint32_t M0A,
                       const uint32_t M1A);
 
void dma_configure_data(const dma_peripheral_t dma, const uint8_t stream,
                        const uint16_t count, const dma_datasize_t msize,
                        const dma_datasize_t psize);
 
void dma_set_direction(const dma_peripheral_t dma, const uint8_t stream,
                       const dma_dir_t direction);
 
void dma_configure_stream(const dma_peripheral_t dma, const uint8_t stream,
                          const struct DMAStreamConfig config);
 
void dma_set_channel(const dma_peripheral_t dma, const uint8_t stream,
                     const uint8_t channel, const dma_priority_t priority);
 
void dma_set_interrupts(const dma_peripheral_t dma, const uint8_t stream,
                        const struct DMAStreamISR config);
 
void dma_enable(const dma_peripheral_t dma, const uint8_t stream);
 
void dma_disable(const dma_peripheral_t dma, const uint8_t stream);
 
#endif